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DTSTART;TZID=America/Los_Angeles:20251208T091500
DTEND;TZID=America/Los_Angeles:20251208T103000
DTSTAMP:20260417T054647
CREATED:20251205T173457Z
LAST-MODIFIED:20251205T174005Z
UID:10005749-1765185300-1765189800@events.ucsc.edu
SUMMARY:Jamilan\, S. (CSE) -  Profile-guided Compiler Optimizations for Data Center Workloads
DESCRIPTION:Modern applications\, such as data center workloads\, have become increasingly complex. These applications primarily operate on massive datasets\, which involve large memory footprints\, irregular access patterns\, and complex control and data flows. The processor-memory speed gap\, combined with these complexities\, can lead to unexpected performance inefficiencies in these applications\, preventing them from achieving optimal performance. Considering the complexity and size of data center applications\, manually identifying and resolving performance issues is often impractical or impossible. Instead\, developing new compiler optimization techniques can be a more effective and scalable solution to boost both performance and energy efficiency. In this thesis\, we focus on identifying the root causes that limit the performance of data center workloads. We analyze the limitations of current profile-guided compiler optimization techniques for addressing these performance gaps. Finally\, we propose two profile-guided optimization techniques\, APT-GET and RIFS\, which can be integrated into the LLVM optimization pipeline to deliver further improvements. To hide the long latency of memory accesses\, we introduce APT-GET\, a profile-guided technique that ensures timely prefetches by leveraging dynamic execution-time information to build a novel analytical model that finds the optimal prefetch distance and injection site based on the collected profile. We study APT-GET across 10 real-world applications and demonstrate that it achieves a speedup of up to 1.98× and an average of 1.30×. To enable runtime value-invariant function specialization to reduce redundant operations\, we introduce RIFS\, a profile-guided compiler technique that specializes functions based on runtime-invariant call-site-specific argument values. RIFS introduces a novel value-profiling LLVM pass to identify runtime invariant arguments and a subsequent LLVM transformation pass to generate specialized function variants tailored to these value profiles. To efficiently select among potentially thousands of specialization candidates\, we develop a predictive cost model that estimates each candidate’s performance benefit before code generation. RIFS achieves an average speedup of 5.3% and an instruction reduction of 2.5% over the LLVM -O3+PGO baseline across 12 real-world applications. \nHost: Saba Jamilan\, Ph.D. Candidate\, Computer Science and Engineering  \nAdvisor: Heiner Litz  \nZoom- https://ucsc.zoom.us/j/95818759324?pwd=rdaS7G1V7O6faRhNOgFyq1OR50eSLK.1 \nPasscode- 652917 \n 
URL:https://events.ucsc.edu/event/jamilan-s-cse-profile-guided-compiler-optimizations-for-data-center-workloads/
LOCATION:Engineering 2\, Engineering 2 1156 High Street\, Santa Cruz\, CA\, 95064
CATEGORIES:Ph.D. Presentations
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20251208T130000
DTEND;TZID=America/Los_Angeles:20251208T140000
DTSTAMP:20260417T054647
CREATED:20251202T163305Z
LAST-MODIFIED:20251202T163305Z
UID:10005718-1765198800-1765202400@events.ucsc.edu
SUMMARY:de Priester\, J. (ECE) - Hybrid Reinforcement Learning
DESCRIPTION:Reinforcement Learning (RL) is a machine learning paradigm that trains a decision maker\, or policy\, by learning from interaction with an environment. The power of RL lies in its ability to learn complex strategies without explicit human instruction\, which can lead to better solutions that human designers overlook in domains ranging from robotics to scientific discovery. Despite these successes\, applying RL to safety-critical control systems remains a significant challenge due to the fragility of black-box policies. Standard RL controllers are prone to “chattering” or indecisiveness\, which is rapid\, detrimental switching between decisions induced by small disturbances\, and lack formal closed-loop safety\, stability\, and robustness guarantees. Furthermore\, existing discrete and continuous-time RL paradigms struggle to model hybrid systems\, where continuous state evolution is intertwined with instantaneous discrete updates. Consequently\, standard RL approaches cannot effectively be applied to safety-critical hybrid dynamical systems\, as such approaches suffer from discretization artifacts\, computational inefficiency\, and a lack of closed-loop safety\, stability\, and robustness guarantees. \nTo bridge the gap between hybrid control theory and RL\, this research proposal is organized into four interconnected thrusts. Thrust 1 addresses the fragility of existing standard RL-based policies by designing RL algorithms to construct robust hybrid supervisors to eliminate chattering. Thrust 2 establishes the theoretical bedrock of a native hybrid RL formulation. By leveraging insights from discounted MPC\, the hybrid RL problem is formulated with intrinsic closed-loop stability\, safety\, and robustness properties. Thrust 3 extends standard RL components to the hybrid domain to create RL algorithms capable of solving the hybrid RL problem defined in Thrust 2. Finally\, Thrust 4 provides comprehensive empirical validation\, confirming the robustness of the supervisors from Thrust 1 and demonstrating the advantages of the native hybrid RL formulation developed in Thrusts 2 and 3 over a standard RL formulation. \nHost: Jan de Priester\, Ph.D. Student\, Electrical and Computer Engineering  \nAdvisor: Ricardo Sanfelice \nZoom- https://ucsc.zoom.us/j/95229790206?pwd=ICevzd4QdEE7ZAlYALZIYbhU2bCU4W.1 \nPasscode-  981137
URL:https://events.ucsc.edu/event/de-priester-j-ece-hybrid-reinforcement-learning/
LOCATION:Jack Baskin Engineering\, Baskin Engineering 1156 High Street\, Santa Cruz\, CA\, 95064
CATEGORIES:Ph.D. Presentations
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DTSTART;TZID=America/Los_Angeles:20251208T130000
DTEND;TZID=America/Los_Angeles:20251208T140000
DTSTAMP:20260417T054647
CREATED:20251203T220535Z
LAST-MODIFIED:20251203T220535Z
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SUMMARY:Ferdous\, N. (CSE) - SPECSIM : A Simulation Infrastructure Mitigating Transient Timing Attacks
DESCRIPTION:   Transient execution attacks are serious security threats in modern-day processors. Out-of-order execution compels the processor to access data that should not be otherwise perceived. Leakage of that secret information creates a covert channel for the attacker for various types of transient and speculative attacks. Transient based execution attacks emanate when the secret information is leaked by the execution of transient instructions which are executed by the processor but never got committed from the processor pipeline. However\, on the microarchitectural level\, the effect of these transient instructions is noticeable. Generally\, microarchitectural state is the state that a processor maintains to improve performance which is transparent to software. The secret data retained in the microarchitectural state are susceptible to create a covert channel and thereby are at higher risk to be observed by the attacker for transient attacks.\nThis research work presents a robust and secure simulation infrastructure that implements multiple strategies to mitigate transient attacks in the timing domain. This work proposes various strategies e.g.\, Reorder Buffer Transient Flushing Technique in Randomized Transient Pipeline\, SpecSCB for making the speculative instructions invisible to the architectural state\, for the mitigation of the timing attack. In this work\, transient instructions are added in the proposed Randomized Transient Pipeline and are flushed effectively\, using Transient Flushing Techniques\, squashing all the transient instruction residues that could remain in the Randomized Transient Pipeline. This flushing strategy also ensures no difference in the execution time of the base simulation and the proposed Randomized Transient Simulation\, leaving no leakage for transient based timing attacks. In addition to the simulation platform\, a novel Transient Verification Framework is also proposed which consists of Global Time Signature Verification Model and Retirement Time Signature Verification Model. The transient verification framework identifies if there is any anomaly in the timing domain\, related to all existing instructions\, which could leave space for covert channel for timing attacks. Overall\, this work has provided an extensive and robust simulation platform infrastructure for the researchers to explore various types of attacks with their respective mitigating solutions. \nHost: Nilufar Ferdous\, Ph.D. Student\, Computer Science and Engineering  \nAdvisor: Jose Renau  \nZoom- https://us06web.zoom.us/j/84111701472?pwd=l3s5sQszKt35paVOWNxxLaE8jphG80.1 \nPasscode- Qi1pAk
URL:https://events.ucsc.edu/event/ferdous-n-cse-specsim-a-simulation-infrastructure-mitigating-transient-timing-attacks/
LOCATION:Engineering 2\, Engineering 2 1156 High Street\, Santa Cruz\, CA\, 95064
CATEGORIES:Ph.D. Presentations
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20251208T140000
DTEND;TZID=America/Los_Angeles:20251208T150000
DTSTAMP:20260417T054647
CREATED:20251205T175704Z
LAST-MODIFIED:20251205T175952Z
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SUMMARY:Wang\, Y. (CSE) - Toward Practical and Effective Large Language Model Unlearning
DESCRIPTION:The growing integration of Large Language Models (LLMs) into real-world applications has heightened concerns about their trustworthiness\, as models may reveal private information\, reproduce copyrighted content\, propagate biases\, or generate harmful instructions. These risks\, alongside emerging privacy regulations\, motivate the need for LLM unlearning\, methods that remove the influence of specific data while preserving overall model capability.\nThis proposal investigates how to design practical and effective unlearning methods that enable LLMs to produce reliable and responsible outputs. We study both training-free and training-based paradigms. On the training-free side\, we introduce ECO\, which achieves unlearning via embedding-corrupted prompts detected by a lightweight classifier\, and DRAGON\, a generalizable black-box framework that combines detection with chain-of-thought guard reasoning for safe in-context intervention. On the training-based side\, we present FLAT\, a forget-data-only loss adjustment method grounded in a variational $f$-divergence formulation.\nTogether\, these approaches provide complementary strategies for aligning LLM behavior with safety and regulatory requirements while maintaining general utility. This proposal outlines their motivation\, design\, empirical performance\, and the broader research plan toward responsible and accountable LLM systems. \nHost: Yaxuan Wang\, Ph.D. Student\, Computer Science and Engineering  \nAdvisor: Yang Liu \nZoom- https://ucsc.zoom.us/j/94186242839?pwd=ubGMNF25W8gABNIl2S7EaIBHEXletV.1 \nPasscode- 786334
URL:https://events.ucsc.edu/event/wang-y-cse-toward-practical-and-effective-large-language-model-unlearning/
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CATEGORIES:Ph.D. Presentations
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