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ECE Seminar: “Why Do Chips Get Hot? Electro-Thermal Co-Design for Next-Generation Transistors”

October 5 @ 10:40 am – 11:45 am
A man with black hair and glasses stands in front of a building with large windows. He is wearing a blue dress shirt, blue tie, and grey jacket.

Presented by: Young Suh Song, Knight-Hennessy PhD candidate @ Stanford University

Description: “The rapid growth of information technology (IT) has led to remarkable progress in recent semiconductor technology. Transistors have become smaller so that more transistors can be packed into a chip, and today’s semiconductors even use technology that vertically stacks layers of transistors. Although this has led to improved electrical performance of semiconductors, the increase in the number of transistors and interfaces in semiconductors has concomitantly worsened their thermal properties. In this talk, I will first explain why chips get hot and introduce the materials and transistor structures used in the latest logic and memory semiconductors. Based on this, I will discuss a range of structural and materials engineering approaches that have been explored to improve thermal properties in state-of-the-art semiconductors, including metal-oxide-semiconductor field-effect transistors (MOSFETs) and 4F 2 3D dynamic random-access memory (DRAM) technology. Finally, I will wrap up the talk by presenting my vision of how future research could keep chips cool.”

Bio: Young Suh Song is a PhD candidate in the department of Electrical Engineering at Stanford University. He received his bachelor’s and master’s degrees in the department of Electrical and Computer Engineering at Seoul National University, South Korea. His research focuses on electro-thermal co-design for advanced semiconductor devices and systems by utilizing improved structures and emerging materials. With this focus, he has authored and co-authored over 50 research papers in journals and conferences including Nature Nanotechnology, ACS Nano, and IEEE International Electron Devices Meeting (IEEE IEDM). He previously worked as a research scientist at IBM T. J. Watson Research Center, focusing on electro-thermal co-optimization in advanced CMOS nodes. His interdisciplinary work has been recognized with several honors, including the outstanding reviewer award for Semiconductor Science and Technology (IOP Publishing, 2025) and best paper awards from IEEE ICCSS (2022) and IEIE (2020). More information can be found at https://sites.google.com/view/yssong24

 

Hosted by: Professor Zhicong Yu, Electrical & Computer Engineering Department

When: Monday, October 5th from 10:40 to 11:45 AM PST

Location: Classroom E2-194

Details

  • Date: October 5
  • Time:
    10:40 am – 11:45 am
  • Event Category:

Other

Room Number
194

Venue